Layout optimizations of operational amplifier in deep submicron

Authors

  • SHI Jun Shanghai JianQiao University

Abstract

AbstractOperational amplifies (op amps) are an integral part of many analog and mixed-signal systems. Op amps with vastly different levels of complexity are used to realize functions ranging from DC bias generation to high-speed amplification or filtering. The design of op amps continues to pose a challenge as the supply voltage and transistor channel lengths scale down with each generation of CMOS technologies. The thesis deals with the analysis, design and layout optimization of CMOS op amps in deep Submicron (DSM) from a study case. Finally, layout optimizations of op amps will be given, in which propose optimization techniques to mitigate these DSM effects in the place-and-route stage of VLSI physical design.

Author Biography

SHI Jun, Shanghai JianQiao University

Associate Prof. in electronics Dep. of Mechanical and Electrical College of SJQU.

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Published

2024-04-19

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Section

Microelectronics, nanoelectronics