Performance Comparison of Stacked Dual-Metal Gate Engineered Cylindrical Surrounding Double-Gate MOSFET

Authors

Abstract

In this research work, a Cylindrical Surrounding Double-Gate (CSDG) MOSFET design in a stacked-Dual Metal Gate (DMG) architecture has been proposed to incorporate the ability of gate metal variation in channel field formation. Further, the internal gate's threshold voltage (VTH1) could be reduced compared to the external gate (VTH2) by arranging the gate metal work-function in Double Gate devices. Therefore, a device design of CSDG MOSFET has been realized to instigate the effect of Dual Metal Gate (DMG) stack architecture in the CSDG device. The comparison of device simulation shown optimized electric field and surface potential profile. The gradual decrease of metal work function towards the drain also improves the Drain Induced Barrier Lowering (DIBL) and subthreshold characteristics. The physics-based analysis of gate stack CSDG MOSFET that operates in saturation involving the analogy of cylindrical dual metal gates has been considered to evaluate the performance improvements. The insights obtained from the results using the gate-stack dual metal structure of CSDG are quite promising, which can serve as a guide to further reduce the threshold voltage roll-off, suppress the Hot Carrier Effects (HCEs) and Short Channel Effects (SCEs).

Author Biographies

Abha Dargar, Department of Electronic Engineering, Howard College, University of KwaZulu-Natal, Durban South Africa

ABHA DARGAR received her Master’s degree (2014) in Digital Communication and Bachelor degree (2009) in Electronics and Communication Engineering. She is currently pursuing her Ph.D. in the Electronics Engineering at Howard College, University of KwaZulu-Natal, Durban, South Africa. Her research interest includes device design, circuit modeling, Microelectronics, VLSI, wireless communication, Microwave and Communication Engineering. She authored/co-authored various scientific contributions including articles in international refereed journals, and IEEE conferences. She is member of IEEE and IEEE Women in Engineering.

Viranjay M. Srivastava, Department of Electronic Engineering, Howard College, University of KwaZulu-Natal, Durban South Africa

VIRANJAY M. SRIVASTAVA received his Ph.D. degree (2012) in the field of RF Microelectronics and VLSI design, Master’s (2008) in VLSI design, and Bachelor (2002) in Electronics and Instrumentation Engineering. He has worked for the fabrication of devices and development of the circuit design. Presently, he is working as an Associate Professor in the department of electronic engineering, Howard College, University of KwaZulu-Natal, Durban, South Africa. He has more than 18 years of teaching and research experience in the area of VLSI design, RFIC design, and analog IC design. He has supervised various Bachelors, Masters and Doctoral research. He is a Professional Engineer (ECSA), South Africa, senior member of IEEE, SAIEE and member of IET, IEEE-HKN, IITPSA. He authored/co-authored more than 240 scientific contributions including articles in international refereed journals, chapters in book, and conferences.

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Published

2024-04-19

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Microelectronics, nanoelectronics