Design of low–power 4-bit Flash ADC using Multiplexer based encoder in 90nm CMOS process

Authors

  • Shylu Sam Karunya Institute of Technology & Sciences http://orcid.org/0000-0001-5559-0202
  • Sam Paul Karunya Institute of Technology & Sciences
  • Diana Jeba Jingle Christ University, Bangalore
  • Mano Paul Alliance University, Bangalore
  • Judith Samuel Karunya Institute of Technology & Sciences
  • Reshma J Karunya Institute of Technology & Sciences
  • Sarah Sudeepa Karunya Institute of Technology & Sciences
  • G Evangeline Karunya Institute of Technology & Sciences

Abstract

This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence open-loop comparator and mux-based encoder are used to obtain improved performance. Simulation results shows that the simulated  design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz  and  supply  voltage of 1V.

Author Biographies

Shylu Sam, Karunya Institute of Technology & Sciences

ECE Department,

Karunya Institute of Technology & Sciences,

Karunya Nagar,

Coimbatore -64114.

Sam Paul, Karunya Institute of Technology & Sciences

Mechanical Department

Diana Jeba Jingle, Christ University, Bangalore

CSE Department

Mano Paul, Alliance University, Bangalore

CSE Department

Judith Samuel, Karunya Institute of Technology & Sciences

ECE Department

Reshma J, Karunya Institute of Technology & Sciences

ECE Department

G Evangeline, Karunya Institute of Technology & Sciences

ECE Department

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Published

2024-04-19

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Section

Signals, Circuits, Systems