The True Random Number Generator Design Using a High-Noise Oscillator

Authors

  • Igor Butryn Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Microelectronics and Optoelectronics
  • Mariusz Derlecki Techinsights Europe Sp. z o.o.
  • Arkadiusz Łuczyk Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Microelectronics and Optoelectronics
  • Jakub Jasiński Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Microelectronics and Optoelectronics
  • Andrzej Wielgus Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Microelectronics and Optoelectronics
  • Krzysztof Siwiec Warsaw University of Technology, Faculty of Electronics and Information Technology, Institute of Microelectronics and Optoelectronics

Abstract

The growing importance of creating appropriate safeguards in electronic systems forces design of integrated circuits dedicated for cryptographic purposes. The paper focuses on True Random Number Generator (TRNG) circuits design allowing generation of random bit stream. Presented TRNG architecture uses low frequency high-noise oscillator for sampling high frequency clock signal. The article also describes a method for obtaining a high noise level in the oscillator. Achieved bit rate of designed TRNG equals 1 Mb/s. The circuit dissipates 144 µW. The design of the TRNG, simulation and measurement results of the manufactured IC chips have been described in the paper also. TRNG circuit has been implemented in 180 nm CMOS technology.

Additional Files

Published

2025-10-13

Issue

Vol. 71 No. 4 (2025)

Section

Microelectronics, nanoelectronics

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Copyright (c) 2025 International Journal of Electronics and Telecommunication

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